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X-WR-CALDESC:Events for Czech Semiconductor Centre
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DTSTART;VALUE=DATE:20260505
DTEND;VALUE=DATE:20260507
DTSTAMP:20260923T153916
CREATED:20260311T112857Z
LAST-MODIFIED:20260311T112933Z
UID:2098-1777939200-1778111999@czechsemiconductorcentre.cz
SUMMARY:Power Semiconductor Devices & Technologies | ECPE Tutorial | ONLINE
DESCRIPTION:The tutorial is aimed at engineers who are engaged in power electronics and want to improve their knowledge and understanding of power devices including the developments expected in near future. \nThe course starts with a general overview on required power device properties and a very basic treatment of semiconductor material and device physics. Blocking capability of the devices\, unipolar and bipolar current transport and gate control will be discussed. Diodes\, MOS transistors (including compensated superjunction MOS) and Insulated Gate Bipolar Transistors (IGBT) will be treated in detail including their dynamical properties\, safe operation and temperature limits. The wide bandgap semiconductor materials silicon carbide and gallium nitride have become important competitors to silicon. Their superior properties for application and the expectations for the next years will be discussed. Also\, issues concerning control\, packaging and integration will be treated in the corresponding contributions. The following chapters demonstrate basic principles of power electronic systems and the basics of intelligent IGBT / MOSFET control circuits. MOS transistor and IGBT gate drivers for various fields of application are discussed in detail. Finally a short overview of hybrid power electronic integration and the most relevant aspects (cooling\, reliability and EMC problems) will be presented. \n  \n\n\n\n\n\n\n\nDate: 05/05/2026 – 06/05/2026 \n\n\n\n\n\n\n\n\n\n\n\n\n\n\nLocation: Digital Event \n\n\n\n\n\n\n\n\n\n\n\n\n\n\nTechnical Chair: \nDr. Anton Mauder\, Infineon Technologies (DE)\nProf. Nando Kaminski\, University of Bremen (DE) \n\nECPE Contact:\nMarietta Di Dio\n+49 911 81 02 88 – 13\nmarietta.didio@ecpe.org \n\nRegistration Deadline: 28 April 2026
URL:https://czechsemiconductorcentre.cz/event/power-semiconductor-devices-technologies-ecpe-tutorial-online/
LOCATION:on-line
CATEGORIES:External Event
ATTACH;FMTTYPE=image/png:https://czechsemiconductorcentre.cz/wp-content/uploads/2026/03/Snimek-obrazovky-2026-03-11-122756.png
ORGANIZER;CN="ECPE":MAILTO:svenja.roth@ecpe.org
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=Europe/Prague:20260513T110000
DTEND;TZID=Europe/Prague:20260513T170000
DTSTAMP:20260923T153916
CREATED:20260507T075412Z
LAST-MODIFIED:20260507T075412Z
UID:2263-1778670000-1778691600@czechsemiconductorcentre.cz
SUMMARY:Invitation to the Webinar#4 ALL2GaN Insights: Driving Greener Power Electronics
DESCRIPTION:ALL2GaN Insights: Driving Greener Power Electronics – The Wednesday Webinar Series \nWebinar#4 : 13.05.2026 at 11 a.m. \nNovelties in HV GaN power devices from ALL2GaN \nPresenters: Gianmauro POZZOVIVO (Infineon Technologies Austria AG)\, Elison MATIOLI (EPFL)\, Iordan DOYTCHINOV (Corintis) \nThe webinar hosts three participants who cooperate very strictly in the ALL2GaN project. \nStarting with Gianmauro\, he will present the development and industrialization of 650 V GaN-on-Si power technology on 200 mm wafers\, covering advances in epitaxy\, device processes\, and manufacturing readiness. It highlights the enablement of large-scale production of normally-off lateral GaN HEMTs\, the qualification of lead products for industrial market release\, and briefly outlines future directions toward integrated GaN solutions. \n\n\n\nJoin from the meeting link\n\n\nhttps://infineon.webex.com/infineon/j.php?MTID=m812b4bc8d4194bbbba4041d1eaa50219\n\n\n\n\n\n\n\nJoin by meeting number\n\n\nMeeting number (access code): 2780 340 0314\n\n\nMeeting password: X3gZ5pgGgq2\n\n\n\nAbout the Speakers : \n\n\n\n\n\nName / Surname\nGianmauro POZZOVIVO\nElison MATIOLI\nIordan DOYTCHINOV\n\n\nOrganisation / University\nInfineon Technologies Austria AG\nEPFL\nCorintis SA\n\n\nTitle in the Organisation\nDirector\nProfessor and Director of the POWERlab\nSenior Program Manager\n\n\nRole in ALL2GaN Project\nIn the All2GaN project\, I contribute to WP2 by developing and industrializing best‑in‑class 650V lateral GaN technology (advanced epitaxy and device processing) and advancing integrated high‑voltage GaN solutions through monolithic power ICs and system‑in‑package approaches\, targeting production readiness and market release.\nPartner in Task 2\, O2.3: Breaking the limits: Realizing most advanced GaN HEMT device and integration concepts\nSenior Program Manager responsible for leading Corintis contribution on demonstrating value of topology optimized cooling for future high power (data center applications) GaN modules.\n\n\nAcademic Background\nPhD in Electrotechnics from TU Vienna (2010)\, focused on optimizing GaN HEMTs. Joined Infineon Austria in 2010 as an early GaN technology development engineer\, working on FEOL development plus wafer- and package-level characterization. From 2015–2020\, I managed the development of the first-generation normally-off high-voltage GaN power devices\, launched as CoolGaN in 2021. Today\, I lead High Voltage GaN Technology Development\, managing a team of 20 engineers.\nGaN power devices\nPhD in Precision Engineering (Cranfield University)\, EPFL; background as Principle Investigator on AI research related to drone GPS free navigation systems\, Corintis related scientific contributions in the area of co-packaged and designed cooling.\n\n\nWhat excites you about the project?\nALL2GaN excites me because it’s about speeding up real GaN adoption\, giving engineers practical tools and support to integrate GaN across major applications faster and at scale. That’s the kind of push that can make GaN the next mainstream power semiconductor\nTo develop technologies that can reveal the true capabilities of GaN\nThe opportunity to enable higher-efficiency power electronics for future data centers by integrating advanced microfluidic cooling directly into next-generation GaN power modules.\n\n\nWhat is the biggest challenge in making power electronics greener? [nbsp]\nThe biggest challenge is getting GaN into real products at scale\, making sure it’s reliable in the field\, cost-competitive\, and the supply chain can actually support volume. That’s when “greener” savings become real.\nTo make full use of the GaN properties\nManaging rising heat flux while ensuring efficiency\, reliability\, and scalable manufacturing.\n\n\nLinkedIn\nhttps://www.linkedin.com/in/gianmauro-pozzovivo-66a99a26/ \nhttps://www.linkedin.com/in/elison-matioli-74ab1586/  \nhttps://www.linkedin.com/in/iordan-doytchinov-21b18045/
URL:https://czechsemiconductorcentre.cz/event/invitation-to-the-webinar4-all2gan-insights-driving-greener-power-electronics/
LOCATION:on-line
CATEGORIES:External Event
ATTACH;FMTTYPE=image/jpeg:https://czechsemiconductorcentre.cz/wp-content/uploads/2025/12/shutterstock_2501790583-scaled.jpg
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BEGIN:VEVENT
DTSTART;VALUE=DATE:20260518
DTEND;VALUE=DATE:20260521
DTSTAMP:20260923T153916
CREATED:20260311T113719Z
LAST-MODIFIED:20260520T092505Z
UID:2102-1779062400-1779321599@czechsemiconductorcentre.cz
SUMMARY:Czech Semicon Days 2026
DESCRIPTION:Join us at Czech Semicon Days 2026\, one of the key events for the semiconductor sector in Central Europe. \nFrom 18–20 May 2026 in Prague\, industry leaders\, researchers\, investors and policymakers will come together to discuss the future of semiconductors and their role in next-generation mobility\, autonomous systems and electrification. \nThe programme will feature expert discussions\, networking opportunities and specialised events connecting companies across the semiconductor value chain and strengthening the Czech and European semiconductor ecosystem. \nWe are also pleased to highlight that the Czech Semiconductor Centre will be presenting at the event\, showcasing its role in the European network of competence centres and its activities supporting research\, innovation and collaboration between industry and academia in chip technologies. \nThe programme of Czech Semicon Days 2026 will begin on 18–19 May in Prague\, bringing together industry leaders\, policymakers\, investors and researchers to discuss the future of semiconductors and their role in next-generation mobility. The first day at Bohemia Pavilion\, Výstaviště Prague will feature specialised ecosystem events such as Supplier Day\, focused on strengthening connections across the semiconductor supply chain\, followed by the Czech Semiconductor Ecosystem Development Day\, dedicated to advancing the national semiconductor ecosystem and improving regional readiness to attract new industry investments. On 19 May\, the main conference Czech Investment Forum: Semiconductors for Future Mobility will take place in the historic Fantova Building at Prague’s main railway station\, with keynote speeches\, expert presentations and panel discussions on industry–academia collaboration\, semiconductor innovation hubs and resilient European semiconductor ecosystems. \nThe programme will then continue on 20 May in Brno at the Advanced Chip Design Research Center (ACDRC)\, where participants will gain direct insight into advanced research and collaboration opportunities in semiconductor design and innovation. This will be followed by additional accompanying events and networking activities throughout the week\, providing further opportunities for industry partners\, researchers and policymakers to deepen collaboration\, explore investment opportunities and strengthen the Czech Republic’s role within the European semiconductor value chain. \nCzech Semicon Days provide a unique opportunity to:\n• meet key stakeholders in the European semiconductor ecosystem\n• explore collaboration opportunities across industry and research\n• discuss investment and technology trends shaping the future of semiconductors \n📍 Prague\, Czech Republic\n📅 18–20 May 2026 \nMore information: https://czechsemicondays.com/
URL:https://czechsemiconductorcentre.cz/event/czech-semicon-days-2026/
CATEGORIES:External Event
ATTACH;FMTTYPE=image/png:https://czechsemiconductorcentre.cz/wp-content/uploads/2026/03/ChatGPT-Image-11.-3.-2026-12_46_34.png
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BEGIN:VEVENT
DTSTART;VALUE=DATE:20260521
DTEND;VALUE=DATE:20260522
DTSTAMP:20260923T153916
CREATED:20260320T091517Z
LAST-MODIFIED:20260320T091517Z
UID:2152-1779321600-1779407999@czechsemiconductorcentre.cz
SUMMARY:PIXEurope Connect
DESCRIPTION:Join PIXEurope Connect – Industry Ecosystem Building Day\, taking place on 21 May 2026 in Barcelona. \nOrganized within the framework of the PIXEurope Pilot Line – coordinated by ICFO and co-funded by the Chips Joint Undertaking and participating Member States\, with support from regional authorities – this event will be the first to bring together end-users\, technology providers\, industry leaders and policymakers around this Pan-European initiative. \nThe event will highlight the value of the PIXEurope infrastructure and its role in strengthening Europe’s integrated photonics ecosystem. Through presentations and collaborative sessions\, participants will explore how the Pilot Line can accelerate the adoption of integrated photonic chips\, reinforcing Europe’s technological sovereignty and fostering new industrial and scientific opportunities. \nThe venue of the event will be Torre Glòries\, one of Barcelona’s most iconic landmarks. Located at the entrance to the 22@ innovation district – an ideal setting for PIXEurope’s mission to bridge the gap between research and industrial readiness in advanced photonic integrated circuits.
URL:https://czechsemiconductorcentre.cz/event/pixeurope-connect/
LOCATION:Barcelona\, Barcelona\, Spain
CATEGORIES:External Event
ATTACH;FMTTYPE=image/png:https://czechsemiconductorcentre.cz/wp-content/uploads/2026/03/Snimek-obrazovky-2026-03-20-101451.png
END:VEVENT
BEGIN:VEVENT
DTSTART;VALUE=DATE:20260521
DTEND;VALUE=DATE:20260522
DTSTAMP:20260923T153916
CREATED:20260504T074829Z
LAST-MODIFIED:20260525T075119Z
UID:2252-1779321600-1779407999@czechsemiconductorcentre.cz
SUMMARY:Verification Academy Live Brno
DESCRIPTION:Verification Academy Live Brno brings together engineers and researchers from industry and academia to examine advances in functional verification. The program covers the Questa One toolchain\, AI-assisted verification workflows\, and stimulus-free approaches that combine static and formal analysis to uncover issues earlier and more efficiently. \nDYNANIC is co-organizing this event and contributing three sessions to the program  including a technical presentation\, a research-grounded overview\, and a panel discussion. \n\n\n\n\n\n\n\n\nThe seminar also addresses how verification IP continues to evolve to address increasing design complexity\, improve coverage quality\, and reduce overall project risk. Topics directly relevant to FPGA-based system development. \nGet more information & registration here: https://dyna-nic.com/dynanic-at-verification-academy-live/ 
URL:https://czechsemiconductorcentre.cz/event/where-verification-methodology-meets-real-world-practice/
LOCATION:Brno\, Božetěchova 1/2\, Brno\, Czech Republic
CATEGORIES:External Event
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ORGANIZER;CN="DynaNIC":MAILTO:info@dyna-nic.com
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BEGIN:VEVENT
DTSTART;TZID=Europe/Prague:20260522T130000
DTEND;TZID=Europe/Prague:20260522T170000
DTSTAMP:20260923T153917
CREATED:20260520T092202Z
LAST-MODIFIED:20260520T092309Z
UID:2367-1779454800-1779469200@czechsemiconductorcentre.cz
SUMMARY:NanoIC Webinar
DESCRIPTION:Join this online webinar to discover the NanoIC Pilot Line and its cutting-edge technologies for next-generation semiconductor innovation. The session will include an introduction to the pilot line\, presentations on advanced logic\, novel embedded memories\, and advanced interconnect technologies\, as well as information on how to access the pilot line and upcoming training and workforce development opportunities. \nPreliminary Agenda \n\nNanoIC Pilot Line: Introduction\nGiuseppe Fiorentino\nNanoIC Technologies\n\nAdvanced Logic – Yasser Sherazi\nNovel Embedded Memories – Marie Garcia Bardon\nAdvanced Interconnect – Nicolas Pantano\n\n\nAccess to the Pilot Line\nNina Bazzazian\nTraining and Workforce Development\nRuxandra Marina Florea\n\nRead more about NanoIC: https://www.nanoic-project.eu/en \nRegistration here.
URL:https://czechsemiconductorcentre.cz/event/nanoic-webinar/
CATEGORIES:External Event
ATTACH;FMTTYPE=image/jpeg:https://czechsemiconductorcentre.cz/wp-content/uploads/2026/05/1778582712459.jpg
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