Stanislav Černý studied radio electronics and instrumentation at the former Faculty of Electrical Engineering at Brno University of Technology, and his connection with Brno technology does not end there. He likes to emphasize the importance of his alma mater for his career path, which led him to the position of president of the National Semiconductor Cluster less than three years ago. Jana Novotná interviewed him for the university magazine News at BUT.
He ended up at Brno University of Technology thanks to music. He and his friends at Lesní Gymnasium in Zlín had a band, and so that they could continue playing together after graduation, they went to Brno to visit a drummer who had enrolled at BUT. “Those early days at VUT were important – the very beginning of embedded systems, when processor chips were just starting to appear, the 8080 processor was a world first, the CP/M operating system on the Z80 had 6 kB, and the powerful macro editor had 2 kB,” recalls Stanislav Černý.
He says that BUT had a fundamental influence on him. “I fondly remember working with Professor Vladimír Mikula on my thesis, which dealt with sound synthesis. It was about John Chowning’s frequency modulation theory from Stanford University, which was later adopted by Yamaha and incorporated into all of their instruments – their sound is part of the global musical DNA. In my thesis in 1982, I presented a module that provided a real analog version of FM synthesis. Yamaha developed it in the form of chips,” says the BUT graduate, who is still an active guitarist and composer with family roots dating back to Bohuslav Martinů.
After military service, he found a job in the energy sector and began to consistently apply the first microprocessors at a time when large mainframe computers dominated not only the energy sector. “The result of this pioneering effort was that the first telemetry system in the Czech Republic, which connected power plants, was designed based on Zilog Z80 microprocessors. For application development, he implemented his own development hardware, OS, RAM disks, and powerful dual-processor systems. The applications that controlled the blocks were debugged directly in the power plant during full operation. But the Z80 hardware was also capable of playing four voices of Bach’s fugue, which completely fascinated the owner of FESTO, whose system we were using.”
After the revolution, Stanislav Černý founded his own company, CerSoft, focused on tools for developing a new generation of development tools for microprocessor applications. At that time, he collaborated with Otto Fučík from VUT, for example, on a hardware combination of Motorola MCU and FPGA. “I also got an excellent doctoral student in compilers from VUT, Dušan Kolář, the current head of the Department of Information Systems at FIT, and with him and other colleagues, we started developing the Multi-Micro Modula-2 multi-target compiler. We hit the jackpot at a time when all the big players who were creating microprocessors began to increase the integration of functionality on the chip, and the CPU chip became the MCU. However, a paradox arose: while they were integrating a large number of functions into MCUs and competing with each other for a higher degree of integration, almost nothing changed in the development tools available to actual developers and chip users, and applications were unable to easily take full advantage of all the functionality of complex SoCs. And so, in 1997, with his gradually growing team of graduates from Brno University of Technology and Masaryk University, he began to develop a tool that ultimately established the first configuration of an MCU with the principles of generative artificial intelligence and decomposition (HW API) of an embedded system in 1997.
“The term ‘artificial intelligence’ already existed at that time, but that was all. It was the boom of JAVA and Java Beans, and AI had to wait another 15 years. We taught our Processor Expert™ tool to interpret the architectures of thousands of microprocessors and equipped it with a code generator tailored precisely to the detailed requirements of the application, which the user specified in the form of standardized components. The tool ‘wrote’ production-ready, tested code for the correct functioning of the microprocessor, OS, its peripherals, and any external components connected to it,” says Stanislav Černý, describing the tool, which was able to provide users with a faster, more comprehensive, and more accurate service than the application engineers of chip manufacturers and directly indicated the percentage of chip complexity used by applications. Their automotive customers were thus able to shorten application development from a year to two months. “The tool also supported price optimization of the MCU selection for a given application. Development could start on a 32-bit MCU and ultimately end up on a much more cost-effective 8-bit variant using automatic system resource porting technology. With large volumes of chip orders from car manufacturers, this optimization saved considerable money.” The original concept also allowed for the selection of the chip manufacturer, which would have been an invaluable feature during the chip supply shortage at the time of the COVID-19 pandemic. “This resulted in the first configuration development tool of its kind in the world, which incorporated elements of generative artificial intelligence into the creation of chip applications based on its own description of the chip architecture, including HW abstraction, peripherals, and initialization sequences,” says Černý, highlighting the advantages of the tool, which provided customers with the complete MCU source code instead of just PDF documentation from the manufacturer.
In 1999, two years after development began under the wing of UNIS and with financial support from owners Jiří Kovář, Ladislav Chodák, and Petr Špringer, the company acquired its first major customer in Fujitsu Europe. This marked the beginning of the technology’s profitability. In 2001, Processor Expert™ received the EC IST Prize for the best EU IT technology. “This award was also won, for example, by TTTech founder Hermann Kopetz for Time Triggered Technology, with many benefits from the Austrian government. The Czech Republic was still only an EU candidate country, but thanks to our technology, we were invited as partners in European calls for real-time embedded systems with partners such as Nokia, Airbus, Thales, FR Télécom, and others, which led to further growth of the technology and a whole range of great feedback,” emphasizes Černý, adding that the topic of AI development tools is becoming increasingly relevant and, after eighteen years, is also the subject of this year’s ChipsJU call.
At the beginning of the century, many tried to copy the technology – including the Israeli startup Driveway and the German company Toshiba. “Imagine coming to Embedded World in Nuremberg and seeing screencopies of your product at the stand of a major company,” recalls the enterprising researcher. National Semiconductor became the first American partner, and the collaboration with German marketing was an extremely valuable experience for establishing innovative technology from the Czech Republic in the US. The presentation of Motorola’s technology in Nuremberg and Austin in the US meant the end of the Israeli plagiarist Driveway at Motorola. “God’s mills grind slowly… It was the first major American contract and the beginning of an eight-year collaboration that led to the globalization of the world’s first AI generative configuration development tool for chips from the Czech Republic. The team of 24 colleagues, including Marek Trmač, Marek Vinkler, and many others, worked great and implemented up to 80 MCUs from Freescale (the original processor section of Motorola) annually. It functioned as a third party to Freescale, as did IAR Systems, GCC, Keil, and other companies that participated in bringing new chips to market with full software support for customers. In the Czech Republic at that time, Karel Masařík came forward for strategic consultation. He started RISC V, the first open processor platform that was the standard compared to proprietary CPU cores from a commercial point of view. At the same time, consultations were underway around FPGA – SmartNIC technology was taking off in Brno, now represented by BrnoLogic/Dynanic, again associated with UNIS, BUT, and MUNI.
“At Freescale, I was fortunate to meet a number of great people who still work for leading companies today – AMD – Lisa Su, Rapidus, Synopsis – Raja Tabet, Infineon, NXP, Amazon – Greg Hemstreet, and others,” emphasizes Stanislav Černý. Processor Expert™ established the first standard for configuration tools, and all of Freescale’s competitors wanted it. “Companies such as ARM – Reinhard Keil, STMicro, Texas Instruments, and others came to Brno to see us. The integration of tools such as Mathworks Simulink, IDE Codewarrior, and Eclipse was also significant. The tool’s philosophy also worked on completely new SoCs with new features, which led to further expansion of the tool. In 2009, Freescale proposed acquiring the technology and the team, and I was offered the opportunity to establish a branch in Brno. My team became the foundation of Freescale Brno, and our mission could continue.” This was bad news for the above-mentioned technology enthusiasts, who had no choice but to start developing their own configuration tools, which more or less adopted the Processor Expert™ philosophy and implemented it better or worse.
The technology was the basis for the philosophy of Cypress Semiconductor, where John Weil, a big supporter of Processor Expert from Freescale, moved, and where I met the current CEO of onsemi, Hasan el-Khoury. They implemented the next step in the vision – a customer-configurable MCU, where the Processor Expert™ component concept was extended to include HW IP description. This was a revolutionary step. You could have only what your application really needed on the chip, which was critical for battery-powered wearable electronics, for example.” Freescale also developed a cloud version of Processor Expert. After Freescale’s acquisition by NXP, the management at the time paradoxically chose to return to conservative means such as SDK instead of further developing Processor Expert.
“Considering today’s development of AI, it was a step backwards. In 2018, Qualcomm was preparing another acquisition of NXP and had big plans for the Brno branch. In the end, the acquisition did not take place.” In 2018, Stanislav Černý founded his own company, SmarterInstruments, which represented a new beginning for development activities rather than just engineering. “I started working on 3D imaging, artificial intelligence directly on the chip, and solutions for the energy sector. We were looking for challenges in this area, and in 2021, the then Minister of Industry signed the Czech Republic’s accession to European projects of critical importance, the so-called IPCEI for semiconductors, and the Ministry of Industry and Trade announced a call for proposals with up to 100% funding. I invited companies such as Codasip, NXP, MycroftMind, and UJP Praha, with whom I was acquainted, to participate, and ONSEMI, VUT, and others joined in. Within a month, we submitted a proposal to the national round, and the first meeting of participants with the Ministry of Industry and Trade took place,” recalls Stanislav Černý, who was elected as the national contact point for IPCEI Microelectronics. He thus became the coordinator between the European Commission, the German Ministry of VDI/VDE Innovation, the MIT, and domestic participants. “It was another great learning experience and a major wake-up call for Czech semiconductor activities. A two-year cycle of meetings and work on the program statement began, resulting in project proposals from individual participants across Europe. In one day, representatives of more than a hundred companies gathered online to introduce themselves and establish partnerships at a well-organized matchmaking event (DGConnect). Each project had to have at least four European partners to demonstrate that it addressed and covered the EU’s strategic objectives defined in the chapeau – the IPCEI program statement.” On the part of the EC, this was a historic first step before the EU ChipsAct, ChipsJU.
With his professional and business experience, Stanislav Černý began to connect more with domestic partners. On the one hand, around CyberSecurityHub, founded by VUT, MU, and ČVUT, and on the other hand, in a circle that occasionally met at VUT with David Uhlíř from JIC. It was clear to him that it was necessary to generate greater interest in the study of semiconductors and chip design and to activate the possibilities of using IPCEI and the upcoming EU ChipsAct for entities in the Czech Republic. “Cooperation with the Ministry of Industry and Trade on IPCEI and my connections to partners in the EU, Silicon Saxony, brought acceleration to the semiconductor industry. No one, including JIC, was prepared to financially support the launch of these activities, so SmarterInstruments was the investor until the creation of the Czech National Semiconductor Cluster, which was founded with the help of CyberSecurityHub on December 22, 2022.”
As the president of the cluster says, “the ride has begun.” Preparations began for the investment in onsemi, which was needed for the Czech Republic, even though its legislation, including the amount of incentives (only 10% compared to the usual minimum of 25%), was not at all prepared for semiconductors and competition from the US and Korea. The convening of the first round table by the cluster in cooperation with the Czech Chamber of Commerce, with the participation of the Ministry of Industry and Trade, the Office of the Government, the South Moravian Region (JMK), and members of the cluster, including VUT, ČVUT, and CEITEC, was a crucial step in achieving a competitive incentive. Stanislav Černý highlights the work of many people at the Office of the Government, the MIT, and cluster members, without whom it would not have been possible to achieve the changes and ultimately obtain approval for the investment. The next step for the cluster was integration into Silicon Europe, alongside Silicon Saxony, Minalogic, and eleven other key European clusters. Today, they jointly influence the establishment of key European advances for semiconductors, such as the Semiconductor Coalition, IPCEI AST, ChipAct 2, etc. Thanks to the support of the South Moravian Region and the city of Brno, grants were obtained both for the cluster for 2024 and for BUT to support the submission of a call for European chip competence centers within the framework of Pillar I of the EU ChipsAct, which was still being formed, and ChipsJU was created as the EC’s governing body. “My colleagues and I were clear about what was absolutely essential for us: firstly, to move towards a national semiconductor strategy, to create a semiconductor ecosystem, because we had nothing that connected the academic and industrial sectors, and to promote internationalization so that the cluster would not only be national but also European. Saxony had a 20-year head start on us in creating an ecosystem, which we couldn’t just catch up with, but our current status of 46 members in two years versus their 100 in the Dresden ecosystem is not a bad result at all. We make sure that our selected members are connected to the semiconductor value chain. The only exceptions are the big end players who set the direction for chips to take, and municipalities.”
Stanislav Černý emphasizes the enormous contributions of Deputy Minister Eduard Muřický and his colleagues Radan Kubant, Martina Trkanová from the Ministry of Industry and Trade, Deputy Minister Petr Očko, as well as Deputy Minister Jana Havlíková, Patrik Budský, and Jana Soukupová from the Office of the Government, without whom the chances of success would have been slim. No other field except microelectronics has succeeded in implementing IPCEI. Half a billion crowns were allocated to it for four winning projects. “More than a hundred projects originally submitted within the EU were reduced to 56, four of the original Czech projects passed, and two of them have been notified. Essentially all major European institutions, including academic ones, are involved in IPCEI in various positions as different types of partners. We are currently preparing the Czech Republic’s involvement in another IPCEI AST,” says the cluster president.
Stanislav Černý attaches fundamental importance to the European Chips Act. “After IPCEI ME/CT, the EC embarked on the Chips Act, and the Czech Republic resolved the legislative part during its presidency – the Ministry of Industry and Trade, the Office of the Government, the Ministry of Foreign Affairs, and others in cooperation with the CNSC. Under Pillar I, a framework of measures was proposed to support the growth of the European fabless industry, which is not doing well. Its global share is only eight percent, so the European Commission’s goal is to strengthen it and remove all barriers for startups and SMEs in chip development,” he explains.
Relations with Taiwan began to strengthen in the first year of the 2023 cluster. After strengthening relations at the academic level, Taiwan expressed interest in connecting more with the Czech Republic’s semiconductor ecosystem, and shortly thereafter, the first NARLABS delegation arrived in Brno. Its participants learned about the potential of the ecosystem, which was still in its infancy, and a proposal was made to establish a joint Taiwanese and Czech design center here. The cluster thus participated in the establishment of the first center in its history—ACDCR.
Another goal was to establish a chip competence center within Pillar I, which was gradually created under the auspices of DG Connect and ChipsJU. At the beginning, there was a lot of uncertainty about the definition and components of Pillar I, but the budget was known, which attracted a number of interested parties to the center at once. “The previous work of the CNSC materialized in the possibility of obtaining a substantial financial subsidy for semiconductors. However, applicants who only wanted the subsidy, without any prior work or investment, and who were not interested in maintaining the national level of the center began to push to the forefront. It was a period of conflict between the Czech Republic’s vision for growth in the field of semiconductors and pressure that was not backed by competence. Maintaining competence was absolutely essential, and unfortunately, it took a great deal of effort to achieve this. There were many who discovered semiconductor competencies in themselves overnight. We always wanted the Czech center to be national, which was not easy, but the cluster stood firm behind this. With the entry of BUT Rector Ladislav Janíček, the situation was stabilized and a consortium composed of CNSC and JIC members was finally established.
In parallel with drafting the national competence center project based on the profile of the cluster and other partners at BUT, CNSC worked on the Czech Republic’s entry into other components of Pillar I, which meant drafting two projects. “It was the third summer in a row without a vacation, as ChipsJU calls come in May and the deadline is September to October, but at the same time it was great work on drafting, especially with the DECIDE team – Imec, Fraunhofer, CEA-Leti, ChipsIT, etc., which defined the vision for the future IP, EDA marketplace EU. We prepared a project in the DECIDE consortium that received 85 letters of support from institutions not only from the EU for the consortium, which now leads European IP and, in cooperation with pilot lines, is preparing the entire EU IP ecosystem. Another successfully accepted CNSC project is the aCCCess consortium with VDI-VDA, Minalogic, MESAP, Silicon Saxony, which is tasked with coordinating all 30 competence centers in EU member states. In layman’s terms: the design platform is the European ‘brain for fabless’, which concentrates all EDA tools and the IP marketplace and supports users; the pilot lines are the ‘hands’ that produce experimental chips designed in the design platform; and the chip competence centers are the ‘antennae’ that mediate contact between startups, companies, and institutions in member states with the design platform and pilot lines.”
According to Stanislav Černý, the Czech Republic is not doing badly at all so far. “We are well perceived and our national strategy has overtaken a number of European countries, including Poland and Saxony. Based on this, programs such as TAČR , CzechInvest, and other national calls such as Sigma DC 5 are being created, which will enable the establishment of another, already third, center for semiconductor development and education, where the synergy of academic and industrial partners of the cluster, including international cooperation, plays a fundamental role,” concludes the president of the National Semiconductor Cluster.
Source: Jana Novotná (News at BUT)
Photo: Jakub Rozboud (BUT) and CzechInvest
